Essential Components in Sequential Logic Circuits
We already studied:
👉 To simplify design and avoid these problems, engineers developed the D Flip-Flop.
That's why D Flip-Flop is sometimes called the "data latch" or the "delay flip-flop."
A D Flip-Flop is a bistable circuit with:
Two outputs: Q and Q′
👉 On every active clock edge (rising ↑ or falling ↓), the value at D is transferred to Q.
👉 Q′ is always the complement.
If D = 1 at the clock pulse → Q becomes 1.
If D = 0 at the clock pulse → Q becomes 0.
| Clock | D | Q(next) | Description |
|---|---|---|---|
| ↑ | 0 | 0 | Reset (Q=0) |
| ↑ | 1 | 1 | Set (Q=1) |
| 0 | X | Q | No change |
👉 "↑" means rising edge of the clock.
| D | Q(next) | Q′(next) |
|---|---|---|
| 0 | 0 | 1 |
| 1 | 1 | 0 |
âš¡ Notice: There is no invalid state and no race condition.
The input D holds the value we want to store (0 or 1).
When the clock edge arrives, the D value is copied into Q.
Until the next clock edge, Q remains constant (memory).
👉 That's why it's called a delay element: the output Q follows input D, but only after the clock pulse.
Group of D flip-flops used to store multi-bit words (8-bit, 16-bit, etc.).
RAM and cache cells are built using D flip-flops/latches.
Store and shift data sequentially.
Used to avoid timing issues in digital circuits.
Store the current state.
We saw:
👉 But in counters and frequency dividers, we need a flip-flop that toggles its output automatically (switches between 0 and 1 each clock).
That's where the T Flip-Flop comes in.
The T stands for "Toggle."
A T Flip-Flop is a bistable sequential circuit that:
Produces two outputs: Q and Q′.
👉 If T = 1 → The flip-flop toggles (Q switches 0→1 or 1→0) on each clock edge.
👉 If T = 0 → The flip-flop holds its previous state (no change).
| T | Q(next) | Q′(next) | Description |
|---|---|---|---|
| 0 | Q | Q′ | No change (hold) |
| 1 | Q′ | Q | Toggle (switch) |
The output doesn't change (it holds memory).
The output flips:
This happens on every active clock edge (↑ or ↓ depending on design).
If J = K = 1 → JK acts like a T Flip-Flop.
By connecting input D = T ⊕ Q (XOR of T and current Q), we can build a T Flip-Flop.
Ripple Counters → Use a series of T flip-flops, each divides the frequency by 2.
e.g., a 4-bit counter = 4 T flip-flops chained.
Since each toggle divides the clock frequency by 2, it's widely used in clock dividers.
Helps in sequential binary counting.
Sometimes for specific toggling operations.
Suppose Q = 0 initially:
👉 So output alternates like: 0, 1, 0, 1… (a square wave).
✅ In simple words:
A D Flip-Flop is like a memory box that copies whatever is at the input D into the output Q only when the clock ticks. Until the next tick, it remembers that value.
A T Flip-Flop is like a light switch: If T=1 → every time you press the clock (switch), the light (Q) toggles ON/OFF. If T=0 → pressing the switch does nothing; it stays in the same state.
Group of flip-flops used for temporary data storage.
Types:
Application: Used inside CPUs, ALUs, and microcontrollers for buffering and holding data.
Built by chaining T or JK flip-flops.
Types: Up counters, Down counters, Up/Down counters.
Applications: Digital clocks, frequency dividers, timers, event counters.
Flip-Flops are the fundamental storage elements for:
Application: Used in primary memory and to hold data temporarily between CPU and devices.
Comparison and Selection:
Choice depends on:
📊 D Flip-Flop (Data / Delay Flip-Flop):
🔄 T Flip-Flop (Toggle Flip-Flop):
🔧 General Applications:
âš¡ Edge vs. Level Triggered:
✅ In Simple Words:
D Flip-Flop = one-bit memory (Q = D at clock).
T Flip-Flop = toggle on/off switch (used in counters).
Registers = many flip-flops grouped to store multi-bit data.
Counters = flip-flops that count clock pulses.
Edge-triggered flip-flops are reliable for real CPUs, while level-triggered are simpler but less safe.