Building the Computational Heart of the CPU
The Arithmetic Logic Unit (ALU) is the computational heart of the CPU. It performs both arithmetic operations (like addition, subtraction) and logic operations (like AND, OR, NOT, XOR).
Designing an ALU means combining registers, adders, logic gates, multiplexers, and control logic into one functional unit.
Store the input data values on which operations are to be performed.
Example: To compute 5 + 3, A = 0101 and B = 0011.
Holds the output after the operation is completed.
Example: If 5 + 3 = 8, then R = 1000.
Without registers, the ALU cannot fetch and store intermediate values.
Performs binary addition.
Can be a half adder, full adder, or ripple carry adder for multi-bit addition.
Example: 0101 + 0011 = 1000.
Often implemented using an adder by taking the 2's complement of the second operand.
Example: 5 – 3 = 0101 + (1101) = 1000 (2).
In most ALUs, subtraction is not a separate circuit but derived from the adder.
Output = 1 if both inputs = 1.
Example: 0101 AND 0011 = 0001.
Output = 1 if at least one input = 1.
Example: 0101 OR 0011 = 0111.
Output = 1 if inputs are different.
Example: 0101 XOR 0011 = 0110.
Inverts bits.
Example: NOT 0101 = 1010.
These operations are essential for comparisons, masking, and decision-making.
The ALU contains multiplexers to choose which output (from arithmetic unit or logic unit) should be passed to the result register (R).
Example:
MUX is like a "traffic controller" inside the ALU.
Encoded signals (operation codes / opcodes) that specify the operation.
Example:
The ALU sets flags after operations:
These flags help the CPU make decisions (e.g., in branching instructions).
Synchronize ALU operations with CPU cycles.
Decodes instructions and generates signals for adders, gates, or shifters.
Ensures operations happen in the right order and timing.
Allow binary data to flow between registers, arithmetic unit, logic unit, and MUX.
Think of data paths as "roads" inside the ALU connecting its parts.
ALU = Registers + Arithmetic Unit + Logic Unit + MUX + Control + Flags + Data Paths
Operands come from registers, processed by adder/logic unit, selected by MUX, stored in result register
Flags are set for CPU decision-making
Control signals from CPU determine which operation is performed
The ALU is the "calculator + decision-maker" inside the CPU, designed from a combination of adders, logic gates, multiplexers, and control circuits
Designing an Arithmetic Logic Unit (ALU) means creating the circuit architecture that can perform multiple arithmetic and logic operations, controlled by operation select signals.
Think of it as designing a Swiss army knife of digital circuits — one block that can do addition, subtraction, AND, OR, XOR, etc., depending on what the CPU asks.
Used to select one output from many functional units based on control signals
Built mainly using binary adders (full adders)
Subtraction → done by 2's complement addition
Multiplication/Division → usually handled by separate circuits or microprogrammed logic
Built from logic gates (AND, OR, NOT, XOR)
Works bit-by-bit across input operands
Performs shift left, shift right, rotate left, rotate right
Useful in multiplication/division by 2 and bit manipulation
A decoder interprets the opcode (operation code) and sends signals to enable the right unit
Example:
These flags are stored in the Program Status Word (PSW) or Flags Register
Suppose we want an ALU that can do:
Steps:
| Control (Opcode) | Operation | Result | Flags Example |
|---|---|---|---|
| 00 | Addition | 1101 (13) | C=0, Z=0, S=0, V=0 |
| 01 | Subtraction | 0111 (7) | C=1, Z=0, S=0, V=0 |
| 10 | AND | 0010 (2) | Z=0 |
| 11 | OR | 1011 (11) | Z=0 |
Allow multiple operations at once by breaking them into stages
Improves throughput and performance
Superscalar processors (e.g., Intel, AMD) have several ALUs working in parallel
Enables instruction-level parallelism
Handles real-number math with high precision
Essential for scientific computing and graphics
Single Instruction, Multiple Data
Process vectors/matrices (used in GPUs and AI)
Reduces carry propagation delay in multi-bit addition
Commonly used in high-performance ALUs
Parallel multiplication circuits for faster computation
Used in advanced ALUs and FPUs
Fast multi-bit shift operations using multiplexers
Essential for efficient bit manipulation
An ALU is like a multi-tool, and ALU design is about wiring together adders, subtractors, logic gates, and shifters, controlled by opcodes, to perform all CPU operations